The present invention relates to a clock supply system and, more particularly, to a clock supply system for multiplex transmission systems.
FIG. 4 shows a prior art clock supply system. In the system, a clock signal is generated from a clock supply circuit 3. Clock distributors 18 and 19 distribute the clock signal to their associated low- and high-rate interfaces 1 and 2. The high-rate interface 2 includes an interface circuit 10, a multiplexer/demultiplexer 9 and a clock substituting circuit 8 as well as an exchanger 7. Each of a plurality of low-rate interfaces 1 includes an interface circuit 4 and a clock substituting circuit 5.
In operation, the clock signal outputted from the clock supply circuit 3 is coupled through the clock distributors 18 and 19 to the clock substituting circuits 5 in the low-rate interfaces 1 and also to the clock substituting circuit 8 in the high-rate interface 2. The clock substituting circuits 5 and 8 substitute a system clock signal for the clock in a transmission line signal. The substituted clock is coupled through the exchanger to the multiplexer/demultiplexer or the low-rate interface circuits.
The above prior art technique uses the clock distributors for the high- and low-rate interfaces, thus posing a problem that the scale of the system is increased from the physical, circuit and power consumption standpoints.
In addition, it is necessary that the input frame phase matching is made in the exchanger. That is, it is necessary in the design to make the phase delay from the clock distributors to the exchanger to be the same in the high- and low-rate interfaces. In the design, however, it is not easy to permit the phase matching in the exchanger, and this is undesired for development.